Scheduled presentations:

• Impact of Transistor I-V Characteristics on Multi-level Programming of 1T1R RRAM Devices
  *E. Perez (IHP – Leibniz Institute for High Performance), E. Perez-Bosch Quesada (IHP – Leibniz Institute for High Performance), K. Dorai Swamy Reddy (IHP – Leibniz Institute for High Performance), M. Uhlmann (IHP – Leibniz Institute for High Performance), C. Wenger (IHP – Leibniz Institute for High Performance)
• A hybrid CMOS-memristor architecture for closed-loop epileptic seizure suppression
  I. Díez de los Ríos (Instituto de Microelectrónica de Sevilla), *L. Camuñas Mesa (Instituto de Microelectrónica de Sevilla), T. Serrano Gotarredona (Instituto de Microelectrónica de Sevilla), B. Linares Barranco (Instituto de Microelectrónica de Sevilla)
• Current-Controlled Inkjet-Printed h-BN Memristors Enabling Reliable Stateful Logic-in-Memory
  *P. Aran (Universitat de Barcelona), G. Vescio (Universitat Politècnica de Catalunya), J. Castillo (Universitat de Barcelona), F. Palacio (Universitat de Barcelona), A. Crespo (Universitat Autònoma de Barcelona), B. Garrido (Universitat de Barcelona), S. Hernández (Universitat de Barcelona), A. Cirera (Universitat de Barcelona)
• A figure-of-merit-based life cycle assessment framework for oxide memristor technologies
  *L. Serrano-Luján (Universidad Rey Juan Carlos), B. Arredondo (Universidad Rey Juan Carlos), A. Urbina (Universidad Pública de Navarra), J. Roldan (Universidad de Granada)