Memristive technologies are emerging as key enablers for next-generation computing architectures, particularly in neuromorphic computing, highly linked to artificial intelligence acceleration. With this approach, the von Neumann bottleneck can be overcome and energy efficiency is improved 1,2. Among the different implementations, oxide-based resistive random-access memories (RRAM), including hafnium oxide (HfO₂), tantalum oxide (Ta₂O₅), and silicon oxide (SiO₂), are especially promising due to their scalability and CMOS compatibility. Recent work has begun to address the environmental implications of these technologies. In particular, a comprehensive Life Cycle Assessment (LCA) study has demonstrated that the environmental footprint of memristors strongly depends on both material selection and fabrication processes, identifying photolithography and electrode materials as dominant contributors, and highlighting SiO₂-based devices among the lowest-impact options 3. These findings underscore the need for standardized approaches to compare technologies beyond purely electrical performance. In this context, we propose a novel framework to evaluate and compare memristor technologies by integrating LCA with device-level performance metrics. A key contribution is the definition of a Figure of Merit (FoM) that enables a fair and functional comparison by combining electrical parameters (switching voltage, current, and switching time) and geometrical factors (device area) with reliability metrics (endurance and retention). This FoM links device efficiency with environmental burden and provides a consistent functional unit for sustainability assessments. Using this approach, we aim to assess the environmental performance of HfO₂-, Ta₂O₅-, and SiO₂-based memristors under a cradle-to-gate perspective. Normalizing environmental impacts using the proposed Figure of Merit significantly changes the relative performance of different devices, emphasizing that the characteristics and functionalities of memristors are crucial for accurately interpreting their environmental footprint. This work bridges device engineering and sustainability analysis, providing a methodological basis for benchmarking emerging memristive technologies and guiding the design of low-impact electronic materials and architectures.