MEMRISTORS2026

Lead-Free Bismuth Halide Perovskite Memristors: From Low-Voltage Switching and Dynamic Physical Modeling for Neuromorphic Applications

  • Kim, So-Yeon (ITQ, CSIC-UPV)
  • Bisquert, Juan (ITQ, CSIC-UPV)

Please login to view abstract download link

Halide perovskite memristors are emerging as promising candidates for next-generation energy-efficient memory and neuromorphic computing. Here, we present a comprehensive device engineering study, supported by dynamic physical modeling, of lead-free bismuth halide perovskite (Ag/Cs₃Bi₂I₉₋ₓBrₓ/ITO) memristors. We demonstrate that compositional engineering provides precise control over device performance. Both I-rich (x=3) and Br-rich (x=6) devices exhibit highly reproducible bipolar switching with SET/RESET voltages below 0.3 V. To elucidate the underlying operating mechanisms, we utilized the conductance-activated quasi-linear memristor (CALM) framework. This physical modeling establishes a quantitative link between microscopic ion dynamics and macroscopic hysteresis, revealing that I-rich layers form highly stable conductive filaments due to a lower density of mobile halide vacancies, while Br-rich compositions achieve ultralow-voltage operation through enhanced vacancy mobility. Building upon this experimentally verified foundation, we applied dynamic physical modeling to project the advanced computing potential of the Cs₃Bi₂I₆Br₃ architecture. Our simulations successfully replicate biologically plausible spike-timing-dependent plasticity (STDP), including long-term potentiation, depression, and asymmetric learning windows. The model demonstrates exceptional synaptic stability (<0.03 % weight variation) even under biologically realistic voltage noise. Furthermore, circuit-level simulations based on these memristive dynamics confirm their viability for robust logic gate operations. By bridging molecular-scale device engineering with physically grounded dynamic modeling, this study establishes a scalable, noise-tolerant lead-free materials platform for the development of low-power neuromorphic hardware and adaptive digital computing.